Process line idea plus according to datatype theory leads to design a novel datatype architecture called TYPELINE. The first part is the implementation of TYPELINE architecture with respect to SDTs and code analysis and the second part is, memory operations and consequently issues related to object memory management. Through these steps, special ISA for this architecture design according to Alpha instruction set is proposed. This instruction set supports critical memory operations and designs with respect to each SDT features. Also control path of TYPELINE should be reviewed.
To use all specifications in TYPELINE architecture, it is needed to follow three critical steps. first is to know scope. this step will be completed when all significant datatypes are identifide. after identifying SDTs it's time to divide design space. this step is performed in architecture design level. for the last step, we should implement all specification according to datatype features and proposed ISA.
First phase of this project is related with implementation of datatype processor for general pupose systems. However this a trade-off to use application specific enviornment, but it received possitive results in paralellism, Energy management and speed-up of the overal computer system. The early result is about 40% enhancement in paralellism and about 18% in consumption reduction.
Dark Silicon Problem
The dark silicon constraints is effected on hardware/software design. The main problem is related to power that is needed to charge all silicones and also thermal management in processors. When design space grows, we should ensure that all parallel units can be used with the same power resource. For example in 90 nm TSCM we can only use about 17% of silicones in the same time. This is optimization problem. In TYPELINE architecture, it is ensured that parallel execution units cannot exceed this amount. Although this should not be considered as a solution for Dark Silicon problem, but still this can be a prevention to use the entire available facilities. Also in future works that can be focused on energy-efficiency, TYPELINE will be a solution for Dark Silicon problem.
Green Computing & Energy-Efficiency
As mentioned before, the main idea of the typeline is about energy consumption reduction. All attemps in this area is focused on energy reduction in large scale computer systems. the overal possitive results could be achieved by identifying SDTs and change the ordinary behavior of the system, as we want and consequently as it could be more effective. Our future research area will be large scale systems like cloud OSs, data centers, DNS servers and distributed computer systems.
This project is began from Master thesis on "A Novel Datatype-Based Software /Hardware Architecture Desing with Green Computing Approach". It is about datatype effects on computer energy consumption and cover all computer framework from programmers, programming languages, Operating Systems, Hardware and also Compilers. The research group members are as follow:
Mehran Alidoost NiaMaster Student(Software Engineering)at university of Guilan, Iran, Rasht. contact info: mehran.alidoost.nia[@]gmail.com, alidoost[@]msc.guilan.ac.ir
Reza Ebrahimi AtaniAssistant Professor at computer department of Guilan University, Iran, Rasht. contact info: reza.ebrahimi.atani[@]gmail.com, rebrahimi[@]guilan.ac.ir
ASPLOS is the premier forum for multidisciplinary systems research spanning computer architecture and hardware, programming languages and compilers, operating systems and networking, as well as applications and user interfaces. The research may target diverse goals such as performance, energy and thermal efficiency, resiliency, security, and sustainability. The importance of such cross-cutting research continues to grow as we grapple with the end of Dennard scaling, the explosion of big data, scales ranging from ultra-low power wearable devices to exascale parallel and cloud computers, the need for sustainability, and increasingly human-centered applications.